Microsystems Prototyping Laboratory

invf201: DUAL INVERTER

• Gate Level Schematic
• Transistor Level Schematic
• Layout
• Logic Equation
• Inputs
• Outputs
• Truth Table
• Terminal Location and Capacitance
• Characterization Data

here.

O2 = B2'

---------------------------
A	B	O1	O2
---------------------------
0	1	1	0
1	0	0	1
---------------------------

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
A1	6.5	22	57.2	27.3	17.4
B2	34.5	22	57.2	27.3	17.4
O1	16	24	-	-	-
O2	25	24	-	-	-
--------------------------------------------

• Delay Information