This homework is a review of FSM design from Digital Devices. These FSMs are simple enough to be worked by paper/pencil methods.
Show the logic for a modulo-three ring counter implemented with D-FFs (state transistions are "00", "01", "10", "00", "01, "10", "00", etc….). Show a logic diagram. Use an asynchronous reset to start in state "00".
Implement the ASM chart shown in the "Datapath" notes using one-hot encoding and D-FFs. The state encodings are: S0 - "001", S1: "010", S2: "100". Use a combination of asynchronous reset/presets to start in state "001".
Modify your design in #2 to guarantee that if you end up in any state other than S0, S1, or S2 that you will transistion to state S0.