Objective:

To Do (part 1):

Implementation Requirements

Testing Your Design

TO DO (part 2)

To Turn In

Check Off

Objective:                

Use the saturating adder and fixed point multiplier done in labs 2 & 3 to implement the blend equation, which is of importance to Computer Graphics applications.

Background

Colors in computer graphic applications can represented as digital quantities in many different manners. One common representation is RGB - Red Green Blue where a fixed number of bits is used for each color.  The term 24-bit color  refers to using 8 bits (1 byte) for each of the components - R, G, B.  The 8-bit value be can be thought of as a fixed point number 0.xxxxxxx representing numbers 0.0 <= Color < 1.0.  Small values represent dark colors, large values represent bright colors.   The R,G,B values end up being translated to analog voltages which drive the input of a RGB monitor.  The R,G,B electron guns inside of the monitor converge on a single point on the screen (called a pixel) to form one color. An RGB color value of (0.0, 0.0, 0.0) represents black, a value of (1.0,1.0, 1.0) represents white,   (1.0, 0.0.,0.0) is pure red, etc.

For each pixel on the screen, an RGB value must be stored in memory, usually in a special area called the screen buffer.  A 1280 x 1024 display has 1,310,720 pixels, each requiring 3 bytes. so the frame buffer would need at least 3.932,160 bytes.    The color values in the frame buffer can be combined with new values being generated by a computer graphics hardware accelerator to produce the interesting graphical effects seen in many computer games, applications, etc.

One common operation that is performed is called the blend operation. The blend operation is the equation:

Cnew = Ci * f  + (1-f) * Cf

Where Cnew is the new color produced by blending the old frame buffer color Cf and the incoming color Ci.  The blend factor f controls the contributions of Ci and Cnew.  A value of  f = 1.0 means that Cnew = Ci, while a value of f=0.0 means that original color is left unchanged.  One use of blending is to implement fog in a 3D scene, transparency effects can also be done via blending.   The above equation would affect each R, G, B component independently, with the same 'f' value applied to all.

To Do (part 1):                             TOC

Implement the following equation:

               Y   =   A * F + (1-F) * B

where A, B are 8 bit numbers in 0.8 fixed point format (0.xxxxxxxx).   The input F is a 9 bit number that will range from 0 to 1.0  .   In binary, this range will be   000000000  to 100000000 (note that there are 9 binary digits).  Not all possible 9-bit codes are valid for F;  the only valid input for F in which the  most significant bit is a '1' is the code 100000000 which represents the decimal value 1.0  .

The computation of (1-F) should not use a subtractor. If the value of F = 1.0 (100000000) then the value of (1-F) should be 0.0 (000000000).  If the value of F= 0.0 (000000000), then the value of (1-F) should be 1.0 (100000000).  For any other value of F, the value of 1-F can be calculated by simply taking the one's complement of F.   This will be incorrect by 1 LSB value, but  it saves gates, is fast,  and is an accepted approximation in computer graphics.

The addition of the two product terms must be a saturating addition as done in Lab #2.  

Implementation  Requirements              

The implementation of the (1-F) operation must be done as a VHDL module.  You should use the saturating adder that you created in Lab #2.  The multiplications need to be performed in the manner as done in Lab #3.   Use the FAST synthesis option when performing the device mapping.

Testing Your Design          TOC                                    

The TBBLEND.GDF file below is a testbench that you can use to test your design. The TBBLEND.SCF file is input waveform file; the BLNDGOLD.SCF is the golden waveform (compare this against the waveform that you get).

RIGHT CLICK on each filename to save to disk:   TBBLEND.GDF,   TBBLEND.SCF,   BLNDGOLD.SCF   .

The 'FM' output on the blend block is the '1-F' value. This needs to be brought out from the blend block for checking purposes.

TO DO (part 2)                                                   TOC

After verifying that your blend design works correctly inside of the testbench, map your blend design tothe EPF10K20RC240-2 (Flex 10K) device.Use the FAST synthesis mode.  Using the RPT file, give the total number of logic cells used..  Use the timing analyzer and report the longest path from input to output.   Also, use the floorplan editor (Menu "MaxPlusII -> FloorPlan Editor") to visually inspect how much of the chip contains logic.  Report if any Cascade or Carry Chains are used (should be visible in the floorplan). 

To Turn In

A plot of your schematic, VHDL files, and the information requested in Part 2.

Check Off    TOC                                                              

You must DEMONSTRATE your blend design to the TA; you must demonstrate that the waveforms produced using your blend design within the testbench matches the golden result.