Some Numbers:

Example:

Let clock frequency = 50 Mhz (slow!), Frag Rate = 50 Mf/s

Let Total Op Count = 30, Frag Processor Width = 1 Fragment

Clocks per frag = (50 Mhz * 1) / 50 Mf = 1 clock per frag

Pipeline stages = 30 ops / 1clk per frag = 30 fragment stages (maximum number of pipe stages).

Now let Clock Frequency = 200Mhz (more realistic)

Clocks per frag = 200 Mhz / 50 Mf = 4 clocks per frag

Pipeline stages = ceiling(30 ops/4 clocks per frag) = 8 stages.

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