VLSI Systems I - EE 8063

Table of Contents

VLSI Systems I - EE 8063

Policy

CAD Tool Facts

Assignments

Interconnect

Via-on-Via vs. Via-on-Line vs. Line-on-Line

MOSIS Submicron Rules

Interconnect Resistance

Interconnect Capacitance

Interconnect R/C Notes

Interconnect R/C Notes (cont).

Interconnect Delay

Reducing Interconnect Delay

Email: reese@erc.msstate.edu

Home Page: http://www.erc.msstate.edu/~reese

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