A data type which consists of a vector or a multi-dimensional set of values of the same base type. Can be used to describe RAMs, ROMs, FIFOs, or any regular multi-dimensional structure.
Syntax ( Key to Notation )
type NewName is {unconstrained} array (IndexTypeName range <>, ...) of DataType; type NewName is {constrained} array (Range, ...) of DataType;
See Declaration
Some synthesis tools do not support multi-dimensional arrays, only support arrays of bits or arrays of vectors, or do not permit ports to be arrays of arrays.
subtype Word is Std_logic_vector(15 downto 0); type Mem is array (0 to 2**12-1) of Word; variable Memory: Mem := (others => Word'(others=>'U')); ... if MemoryRead then Data <= Memory(To_Integer(Address)); elsif MemoryWrite then Memory(To_Integer(Address)) := Data; end if;
Range, Name, String, Type
VHDL Quick Reference
Doulos Training
Courses
Back to the VHDL Golden Reference Guide
Copyright 1995-1997 Doulos
This page was last updated 25th June 1996
We welcome your e-mail comments. Please contact us at: webmaster@doulos.co.uk