Worldwide Course Schedule, Doulos VHDL Training and Verilog Training

Course Locations andVHDL TechClasses in the United Kingdom

Public courses now in 7 countries in 3 languages.
In England, Scotland, France, Germany, The Netherlands, Sweden, and the United States.

And..., you can pay for Doulos courses in euros, if you wish

Southern England	United States
Edinburgh	Manchester
France (course leadership in French)	Sweden
Germany (course leadership in German)	The Netherlands

In the United States:
To provisionally book a place on one of our Public Courses, or for On Site Course details, please click here.

In Europe and the Far East:
To provisionally book a place on one of our Public Courses, or for On Site Course details, please click here.

On Site Courses also available in North America and the Far East

European Public Course Schedule for February 1999 through June 1999

Week M T W T F    Course Dates 6 Comprehensive VHDL    February 8th - 12th 6    Advanced VHDL Techniques    February 9th - 12th 7 Verilog for FPGA/ASIC Design      February 15th - 18th 7 Advanced VHDL Techniques      February 15th - 18th 8  Comprehensive VHDL    February 22nd - 26th 9 Comprehensive VHDL    March 1st - 5th 10 Comprehensive VHDL    March 8th - 12th 10   Advanced VHDL for Synthesis      March 9th - 11th 11    Verilog for FPGA/ASIC Design    March 16th - 19th 11   Altera TechClass      March 17th - 18th 12 Advanced VHDL Techniques      March 22nd - 25th 12 Comprehensive VHDL    March 22nd - 26th 12  Comprehensive VHDL (Systems)    March 22nd - 26th 13   Xilinx TechClass      March 30th - 31st 13    Advanced VHDL Techniques    March 30th - April 2nd 15 Comprehensive VHDL    April 12th - 16th 16 Comprehensive VHDL    April 19th - 23rd 16  Comprehensive VHDL    April 19th - 23rd 17   Xilinx TechClass      April 28th - 29th 17   Advanced VHDL for Synthesis      April 27th - 29th 17 Verilog for FPGA/ASIC Design      April 26th - 29th 18    Verilog for FPGA/ASIC Design    May 4th - 7th 19  Comprehensive VHDL    May 10th - 14th 19 Advanced VHDL Techniques      May 10th - 13th 20   Altera TechClass      May 18th - 19th 20   Xilinx TechClass    May 20th - 21st 20 Advanced VHDL Techniques      May 17th - 20th 20 Advanced VHDL Techniques      May 17th - 20th 20  Comprehensive VHDL    May 17th - 21st 21 Comprehensive VHDL    May 24th - 28th 23  Comprehensive VHDL (Systems)    June 7th - 11th 24  Comprehensive VHDL    June 14th - 18th

Comprehensive VHDL for FPGA/ASIC
Verilog for ASIC Design
AVT, Advanced VHDL Techniques
Advanced VHDL for Synthesis
Comprehensive VHDL for Systems

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This page was last updated 19^th February 1999

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