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Here are some FPGA CPU papers and talks by Jan Gray of Gray Research LLC.
- j32.pdf: Homebrewing RISCs in FPGAs (1996), slides
on the 32-bit j32 FPGA CPU+SoC in an XC4010.
- xsoc-series-drafts.pdf:
drafts for the Circuit Cellar Series: Building a RISC System-on-a-Chip in an FPGA (1999), on the design of XSOC/xr16.
- xsoc-slides.pdf: Processor and Integrated System Design in FPGAs (1999).
- isca00-wcae-paper.pdf: ISCA'00 Workshop on Comp. Arch. Education:
Hands-on Computer Architecture - Teaching Processor and Integrated Systems Design with FPGAs (2000). See also Teaching.
- isca00-wcae-slides.pdf: Accompanying slides.
- soc-gr0040-paper.pdf (2000):
DesignCon 2001 paper
Designing a Simple FPGA-Optimized RISC CPU and System-on-a-Chip,
on the design of soc/gr0040.
- soc-gr0040-slides.pdf: Accompanying slides.
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